Lines 60-66
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/** {@link Platform.CPUType#X86_64} Little Endian Windows */ |
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/** {@link Platform.CPUType#X86_64} Little Endian Windows */ |
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X86_64_WINDOWS(Platform.CPUType.X86_64), |
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X86_64_WINDOWS(Platform.CPUType.X86_64), |
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/** {@link Platform.CPUType#SPARC_32} Big Endian Solaris */ |
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/** {@link Platform.CPUType#SPARC_32} Big Endian Solaris */ |
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SPARC_32_SUNOS(Platform.CPUType.SPARC_32); |
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SPARC_32_SUNOS(Platform.CPUType.SPARC_32), |
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/** {@link Platform.CPUType#MIPS_32} Big Endian Unix */ |
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MIPS_32_UNIX(Platform.CPUType.MIPS_32), |
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/** {@link Platform.CPUType#MIPSEL_32} Little Endian Unix */ |
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MIPSEL_32_UNIX(Platform.CPUType.MIPSEL_32); |
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public final Platform.CPUType cpu; |
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public final Platform.CPUType cpu; |
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Lines 77-82
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private final static int[] size_x86_64_unix = { 4, 8, 4, 8, 16, 8, 4096 }; |
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private final static int[] size_x86_64_unix = { 4, 8, 4, 8, 16, 8, 4096 }; |
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private final static int[] size_x86_64_windows = { 4, 4, 4, 8, 16, 8, 4096 }; |
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private final static int[] size_x86_64_windows = { 4, 4, 4, 8, 16, 8, 4096 }; |
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private final static int[] size_sparc_32_sunos = { 4, 4, 4, 8, 16, 4, 8192 }; |
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private final static int[] size_sparc_32_sunos = { 4, 4, 4, 8, 16, 4, 8192 }; |
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private final static int[] size_mips_32_unix = { 4, 4, 4, 8, 8, 4, 4096 }; |
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/* arch os i8, i16, i32, i64, int, long, float, doubl, ldoubl, ptr */ |
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/* arch os i8, i16, i32, i64, int, long, float, doubl, ldoubl, ptr */ |
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private final static int[] align_armeabi = { 1, 2, 4, 8, 4, 4, 4, 8, 8, 4 }; |
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private final static int[] align_armeabi = { 1, 2, 4, 8, 4, 4, 4, 8, 8, 4 }; |
Lines 86-91
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private final static int[] align_x86_64_unix = { 1, 2, 4, 8, 4, 8, 4, 8, 16, 8 }; |
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private final static int[] align_x86_64_unix = { 1, 2, 4, 8, 4, 8, 4, 8, 16, 8 }; |
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private final static int[] align_x86_64_windows = { 1, 2, 4, 8, 4, 4, 4, 8, 16, 8 }; |
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private final static int[] align_x86_64_windows = { 1, 2, 4, 8, 4, 4, 4, 8, 16, 8 }; |
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private final static int[] align_sparc_32_sunos = { 1, 2, 4, 8, 4, 4, 4, 8, 8, 4 }; |
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private final static int[] align_sparc_32_sunos = { 1, 2, 4, 8, 4, 4, 4, 8, 8, 4 }; |
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private final static int[] align_mips_32_unix = { 1, 2, 4, 8, 4, 4, 4, 8, 8, 4 }; |
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public enum StaticConfig { |
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public enum StaticConfig { |
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/** {@link MachineDescription.ID#ARMle_EABI } */ |
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/** {@link MachineDescription.ID#ARMle_EABI } */ |
Lines 101-107
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/** {@link MachineDescription.ID#X86_64_WINDOWS } */ |
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/** {@link MachineDescription.ID#X86_64_WINDOWS } */ |
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X86_64_WINDOWS(ID.X86_64_WINDOWS, true, size_x86_64_windows, align_x86_64_windows), |
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X86_64_WINDOWS(ID.X86_64_WINDOWS, true, size_x86_64_windows, align_x86_64_windows), |
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/** {@link MachineDescription.ID#SPARC_32_SUNOS } */ |
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/** {@link MachineDescription.ID#SPARC_32_SUNOS } */ |
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SPARC_32_SUNOS(ID.SPARC_32_SUNOS, false, size_sparc_32_sunos, align_sparc_32_sunos); |
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SPARC_32_SUNOS(ID.SPARC_32_SUNOS, false, size_sparc_32_sunos, align_sparc_32_sunos), |
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/** {@link MachineDescription.ID#MIPS_32_UNIX } */ |
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MIPS_32_UNIX(ID.MIPS_32_UNIX, false, size_mips_32_unix, align_mips_32_unix), |
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/** {@link MachineDescription.ID#MIPSEL_32_UNIX } */ |
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MIPSEL_32_UNIX(ID.MIPSEL_32_UNIX, true, size_mips_32_unix, align_mips_32_unix); |
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public final ID id; |
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public final ID id; |
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public final MachineDescription md; |
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public final MachineDescription md; |